3.17.30 NDS32 Options

These options are defined for NDS32 implementations:

-mbig-endian

Generate code in big-endian mode.

-mlittle-endian

Generate code in little-endian mode.

-mreduced-regs

Use reduced-set registers for register allocation.

-mfull-regs

Use full-set registers for register allocation.

-mcmov

Generate conditional move instructions.

-mno-cmov

Do not generate conditional move instructions.

-mperf-ext

Generate performance extension instructions.

-mno-perf-ext

Do not generate performance extension instructions.

-mv3push

Generate v3 push25/pop25 instructions.

-mno-v3push

Do not generate v3 push25/pop25 instructions.

-m16-bit

Generate 16-bit instructions.

-mno-16-bit

Do not generate 16-bit instructions.

-misr-vector-size=num

Specify the size of each interrupt vector, which must be 4 or 16.

-mcache-block-size=num

Specify the size of each cache block, which must be a power of 2 between 4 and 512.

-march=arch

Specify the name of the target architecture.

-mcmodel=code-model

Set the code model to one of

`small'

All the data and read-only data segments must be within 512KB addressing space. The text segment must be within 16MB addressing space.

`medium'

The data segment must be within 512KB while the read-only data segment can be within 4GB addressing space. The text segment should be still within 16MB addressing space.

`large'

All the text and data segments can be within 4GB addressing space.

-mctor-dtor

Enable constructor/destructor feature.

-mrelax

Guide linker to relax instructions.